diff --git a/lang/node/patches/patch-deps_v8_src_codegen_riscv_assembler-riscv_h b/lang/node/patches/patch-deps_v8_src_codegen_riscv_assembler-riscv_h
new file mode 100644
index 00000000000..643805b4bb1
--- /dev/null
+++ b/lang/node/patches/patch-deps_v8_src_codegen_riscv_assembler-riscv_h
@@ -0,0 +1,25 @@
+Index: deps/v8/src/codegen/riscv/assembler-riscv.h
+--- deps/v8/src/codegen/riscv/assembler-riscv.h.orig
++++ deps/v8/src/codegen/riscv/assembler-riscv.h
+@@ -425,15 +425,15 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBa
+   // Assembler Pseudo Instructions (Tables 25.2, 25.3, RISC-V Unprivileged ISA)
+   void nop();
+ #if defined(V8_TARGET_ARCH_RISCV64)
+-  void RecursiveLiImpl(Register rd, int64_t imm);
+-  void RecursiveLi(Register rd, int64_t imm);
+-  static int RecursiveLiCount(int64_t imm);
+-  static int RecursiveLiImplCount(int64_t imm);
+-  void RV_li(Register rd, int64_t imm);
++  void RecursiveLiImpl(Register rd, intptr_t imm);
++  void RecursiveLi(Register rd, intptr_t imm);
++  static int RecursiveLiCount(intptr_t imm);
++  static int RecursiveLiImplCount(intptr_t imm);
++  void RV_li(Register rd, intptr_t imm);
+   static int RV_li_count(int64_t imm, bool is_get_temp_reg = false);
+   // Returns the number of instructions required to load the immediate
+   void GeneralLi(Register rd, int64_t imm);
+-  static int GeneralLiCount(int64_t imm, bool is_get_temp_reg = false);
++  static int GeneralLiCount(intptr_t imm, bool is_get_temp_reg = false);
+   // Loads an immediate, always using 8 instructions, regardless of the value,
+   // so that it can be modified later.
+   void li_constant(Register rd, int64_t imm);