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Sync with deps/v8/src/codegen/riscv/assembler-riscv.cc to unbreak

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This commit is contained in:
jca
2026-06-08 20:57:15 +00:00
parent 54f6810829
commit e5c38aee4b
1 changed files with 25 additions and 0 deletions
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lang/node/patches/patch-deps_v8_src_codegen_riscv_assembler-riscv_h
+25
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@@ -0,0 +1,25 @@
Index: deps/v8/src/codegen/riscv/assembler-riscv.h
--- deps/v8/src/codegen/riscv/assembler-riscv.h.orig
+++ deps/v8/src/codegen/riscv/assembler-riscv.h
@@ -425,15 +425,15 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBa
// Assembler Pseudo Instructions (Tables 25.2, 25.3, RISC-V Unprivileged ISA)
void nop();
#if defined(V8_TARGET_ARCH_RISCV64)
- void RecursiveLiImpl(Register rd, int64_t imm);
- void RecursiveLi(Register rd, int64_t imm);
- static int RecursiveLiCount(int64_t imm);
- static int RecursiveLiImplCount(int64_t imm);
- void RV_li(Register rd, int64_t imm);
+ void RecursiveLiImpl(Register rd, intptr_t imm);
+ void RecursiveLi(Register rd, intptr_t imm);
+ static int RecursiveLiCount(intptr_t imm);
+ static int RecursiveLiImplCount(intptr_t imm);
+ void RV_li(Register rd, intptr_t imm);
static int RV_li_count(int64_t imm, bool is_get_temp_reg = false);
// Returns the number of instructions required to load the immediate
void GeneralLi(Register rd, int64_t imm);
- static int GeneralLiCount(int64_t imm, bool is_get_temp_reg = false);
+ static int GeneralLiCount(intptr_t imm, bool is_get_temp_reg = false);
// Loads an immediate, always using 8 instructions, regardless of the value,
// so that it can be modified later.
void li_constant(Register rd, int64_t imm);