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drm/amdgpu/pm: align Hawaii mclk workaround with radeon

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From Alex Deucher
f8f546883e8777493157ccc4fac5794c502fcbd2 in linux-6.18.y/6.18.32
1987c79b4fe5789dfa14423e78b5c25f6acf3e9d in mainline linux
This commit is contained in:
jsg
2026-05-18 02:01:28 +00:00
parent 8eaabadb69
commit b77f7f2a2c
1 changed files with 4 additions and 4 deletions
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sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
+4 -4
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@@ -1329,10 +1329,10 @@ static int ci_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
if ((dpm_table->mclk_table.count >= 2) &&
((dev_id == 0x67B0) || (dev_id == 0x67B1)) &&
(adev->pdev->revision == 0)) {
smu_data->smc_state_table.MemoryLevel[1].MinVddci =
smu_data->smc_state_table.MemoryLevel[0].MinVddci;
smu_data->smc_state_table.MemoryLevel[1].MinMvdd =
smu_data->smc_state_table.MemoryLevel[0].MinMvdd;
smu_data->smc_state_table.MemoryLevel[1].MinVddc =
smu_data->smc_state_table.MemoryLevel[0].MinVddc;
smu_data->smc_state_table.MemoryLevel[1].MinVddcPhases =
smu_data->smc_state_table.MemoryLevel[0].MinVddcPhases;
}
smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F;
CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel);